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nn31001a page 1 of 33 product standards ? high-speed response dc-dc step down regulator circuit that employs hysteretic control system ? built-in inductor and capacitors ? skip (discontinuous) mode for high efficiency at light load maximum output current : 7 a ? input voltage range : pvin=avin = 4.5 v to 28 v, output voltage range : 0.6 v to 5.5 v selectable switching frequency 400 khz / 600 khz / 800khz ? built-in feed back resistors for 1.0 v / 3.3 v default settings configurable output voltage settings using external resistors ? adjustable soft start ? low operating and standby quiescent current ? open drain power good indication for output over / under voltage ? selectable auto recovery / latch off protection system ? adjustable current limit threshold ? built-in under voltage lockout (uvlo), thermal shut down (tsd), under voltage detection (uvd), over voltage detection (ovd), short circuit protection (scp) over current protection (ocp) ? plastic quad flat non-leaded package heat slug down (qfn type, size : 8.5 mm ? 7.5 mm, 0.5 mm pitch) applications nn31001a is a synchronous dc-dc step down regulator (1-ch), power supply in package (psip), which integrates a controller ic that employs a hysteretic control system, two power mosfets, an inductor and capacitors into a single 8.5 x 7.5 x 4.7mm qfn package. the easiness of mounting psip onto a printed circuit board (pcb), a very small footprint and a highly reduced number of external components, offers very compact and simplified solutions for applications requiring point- of-load design. the number of external components have been reduced to only input/output capacitor, slow start capacitor and feedback resistors. furthermore, for applications requiring an output voltage of 1.0 v / 3.3 v, the exte rnal feedback resistors can be eliminated, resulting into even a smaller footprint. the psip achieves efficiencies of greater than 94% with very good power dissipation capabilities. condition : vin = 12 v, v out setting = 1.0 v / 3.3 v switching frequency = 400 / 600 / 800 khz, skip mode co = 66 f ( 22 f x 3 ) 7 a synchronous dc-dc step down regulator, power supply in package (v in = 4.5 v to 28 v, v out = 0.6 v to 5.5 v) simplified application note : the application circuit is an example. the operation of the mass production set is not guarant eed. sufficient evaluation and verification is required in the design of the mass production set. the customer is fully responsible for the incorporation of the above illustrated application circui t in the design of the equipment. features description vfb en pgood vout pgnd agnd1, 2 ss avin pvin nn31001a vin v out = 1.0v #1.0v / 3.3v without using fb resistor 10 f x 2 100k? 22 f x 3 4.7nf prtcnt ocpcnt vreg bst fsel mode voutm 100k? 1k? 1.5k? lx high current distributed power systems such as ? dsp and fpga point-of-load applications ? routers ? industrial equipment ? space constrained applications etc. 40 50 60 70 80 90 100 0.01 0.1 1 10 iout [a] efficiency [%] vout=1v, fsw=400khz vout=1v, fsw=600khz vout=1v, fsw=800khz vout=3.3v, fsw=600khz vout=3.3v, fsw=800khz 7 vreg http://www.semicon. panasonic.co.jp/en/ doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 2 of 33 product standards ordering information order number feature package output supply nn31001a-bb maximum output current : 7 a 57 pin hqfn emboss taping absolute maximum ratings parameter symbol rating unit notes supply voltage v in 30 v *1 operating free-air temperature t opr ? 40 to + 85 ? c *2 operating junction temperature t j ? 40 to + 150 ? c *2 storage temperature t stg ? 55 to + 150 ? c *2 input voltage range v mode ,v fsel ,v outm ,v prtcnt v ocpcnt ,v fb ? 0.3 to (v reg + 0.3) v *1 *3 v en ? 0.3 to 6.0 v *1 output voltage range v pgood ? 0.3 to (v reg + 0.3) v *1 *3 v lx ? 0.3 to (v in + 0.3) v *1 *4 esd hbm 2 kv ? notes : this product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. this rating is the maximum rating and device operating at this range is not guaranteed as it is higher than our stated recommended operating range. when subjected under the absolute maximum ra ting for a long time, the reliabilit y of the product may be affected. v in is voltage for avin, pvin. v in = av in = pv in . do not apply external currents and voltages to any pin not specifically mentioned. *1 : the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2 : except for the power dissi pation, operating ambient temper ature, and storage temperature, all ratings are for t a = 25 ? c. *3 :(v reg + 0.3) v must not exceed 6 v. *4 : (v in + 0.3) v must not exceed 30 v. doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 3 of 33 product standards power dissipation rating notes : for the actual usage, please follow the power supply voltage, load and ambient temperature conditions to ensure that th ere is enough margin and the thermal design does not exceed the allowable value. *1:glass epoxy substrate (4 layers) [50 ? 50 ? 0.8 t (mm)] *2:glass epoxy substrate (4 layers) [50 ? 50 ? 1.57 t (mm)] caution although this ic has built -in esd protection circuit, it may still sustain permanent damage if not handled properly. therefore, proper esd precautions are recommended to avoid electrostatic damage to the mos gates. recommended operating conditions parameter symbol min typ max unit notes supply voltage range av in 4.5 12 28 v ? pv in 4.5 12 28 v ? input voltage range v mode ?0.3 ? v reg + 0.3 v *1 v fsel ?0.3 ? v reg + 0.3 v *1 v prtcnt ?0.3 ? v reg + 0.3 v *1 v en ? 0.3 ? 5.0 v ? output voltage range v pgood ?0.3 ? v reg + 0.3 v *1 v lx ?0.3 ? v in + 0.3 v *2 notes : voltage values, unless otherwise specified, are with respect to gnd. gnd is voltage for agnd, pgnd. agnd = pgnd v in is voltage for avin, pvin. v in = av in = pv in . do not apply external currents or voltages to any pin not specifically mentioned. *1 : (v reg + 0.3) v must not exceed 6 v. *2 : (v in + 0.3) v must not exceed 30 v. package ? j-c pd (ta = 25 ? c) pd (ta = 85 ? c) notes plastic quad flat non-leaded package heat slug down (qfn type) 6.7 ? c / w 3.49 w 1.82 w *1 5.7 ? c / w 5.56 w 2.89 w *2 doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 4 of 33 product standards parameter symbol condition limits unit note min typ max current consumption current consumption at active1 (skip mode) i vddactn1 i out = 0 a, v fb = 0.620 v r fb1 = 1.0 k ? r fb2 = 1.5 k ? v mode = 0 v, v en = 5 v ? 700 1200 a ? current consumption at active2 (fccm) i vddactn2 v en = 5 v , i out = 0 a r fb1 = 1.0 k ? r fb2 = 1.5 k ? v mode = v reg v fsel = open ?1523ma? avin/pvin current consumption at standby i vinstb av in = pv in = 12 v v en = 0 v ?2 5a? logic pin characteristics en pin low-level input voltage v enl ???0 . 3v? en pin high-level input voltage v enh ? 1.5 ? 5.0 v ? en pin leakage current i leaken v en = 5 v ? 10 20 a ? mode pin low-level input voltage v model ??? v reg ? 0.3 v? mode pin high-level input voltage v modeh ? v reg ? 0.7 ?v reg v? mode pin leakage current i leakmd v mode = 5 v ? 12.5 25 a ? prtcnt pin low-level input voltage v prtl ???0 . 3v? prtcnt pin high-level input voltage v prth ? v reg ?0.3 ??v? prtcnt pin leakage current i leakprt v en = 5 v, v prtcnt = 5 v ? 0 2 a ? fsel pin low-level input voltage v fsell ???0 . 3v? fsel pin high-level input voltage v fselh ? v reg ?0.3 ??v? fsel pin high leakage current i leakfsh v fsel = 5 v ? 6.25 12.5 a ? fsel pin low leakage current i leakfsl v fsel = 0 v ? 6.25 12.5 a ? electrical characteristics c o = 22 f ? 3, v out setting = 1.0 v, v in = av in = pv in = 12 v , switching frequency = 600 khz v mode = v reg (fccm), t a = 25 ? c ? 2 ? c unless otherwise noted. doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 5 of 33 product standards parameter symbol condition limits unit note min typ max vreg characteristics output voltage v rego i vreg = 5ma 5.3 5.6 5.9 v ? input voltage variation v reglin v reglin = v reg (v in =12 v) -v reg (v in =6 v) i vreg = 5ma ? ? 150 mv ? drop out voltage v regdo v in = 4.5 v, i vreg = 5ma 4.1 ? ? v ? vfb characteristics vfb comparator threshold v fbth ? 0.594 0.600 0.606 v ? vfb pin leakage current 1 i leakfb1 v fb = 0 v ? 1 ? 1 a ? vfb pin leakage current 2 i leakfb2 v fb = 6 v ? 1 ? 1 a ? under voltage lock out uvlo shutdown voltage v uvlode v in = 5 v to 0 v 3.97 4.10 4.23 v ? uvlo wakeup voltage v uvlore v in = 0 v to 5 v 4.17 4.30 4.43 v ? uvlo hysteresis ? v uvlo ? 150 200 250 mv ? pgood pgood threshold 1 (vfb ratio for uvd detect) v pguv pgood : high to low 77 85 93 % ? pgood hysteresis 1 (vfb ratio for uvd release) ? v pguv pgood : low to high 3.5 5.0 6.5 % ? pgood threshold 2 (vfb ratio for ovd detect) v pgov pgood : high to low 107 115 123 % ? pgood hysteresis 2 (vfb ratio for ovd release) ? v pgov pgood : low to high 3.5 5.0 6.5 % ? pgood start up delay time ( after reached v fb = 0.6 v ) t pgd ? 0.4 1.0 1.6 ms ? pgood on resistance r pg ? ? 10 15 ? ? electrical characteristics (continued) c o = 22 f ? 3, v out setting = 1.0 v, v in = av in = pv in = 12 v, switching frequency = 600 khz v mode = v reg (fccm), t a = 25 ? c ? 2 ? c unless otherwise noted. doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 6 of 33 product standards parameter symbol condition limits unit note min typ max dc-dc characteristics output voltage 1 v o1 r fb1 = 1.0 k ? r fb2 = 1.5 k ? v mode = v reg i out = 3.5 a 0.985 1.000 1.015 v ? output voltage 2 v o2 r fb1 = 4.5 k ? r fb2 = 1 k ? v mode = v reg i out = 3.5 a 3.250 3.300 3.350 v ? output voltage 3 v o3 v fb = open before v en = 0 v to 1.5 v v mode = v reg i out = 3.5 a 0.985 1.000 1.015 v ? output voltage 4 v o4 v fb = v reg before v en = 0 v to 1.5 v v mode = v reg i out = 3.5 a 3.250 3.300 3.350 v ? efficiency 1 v eff1 pv in = 12 v v out = 5 v, i out = 4 a v fsel = v reg ( 800khz ) ?95?%*1 efficiency 2 v eff2 pv in = 12 v v out = 3.3 v, i out = 4 a v fsel = open ( 600khz ) ?95?%*1 efficiency 3 v eff3 pv in = 12 v v out = 3.3 v, i out = 4 a v fsel = v reg ( 800khz ) ?94?%*1 efficiency 4 v eff4 pv in = 12 v v out = 1.0 v, i out = 4 a v fsel = 0 v ( 400khz ) ?88?%*1 efficiency 5 v eff5 pv in = 12 v v out = 1.0 v, i out = 4 a v fsel = open ( 600khz ) ?87?%*1 efficiency 6 v eff6 pv in = 12 v v out = 1.0 v, i out = 4 a v fsel = v reg ( 800khz ) ?85?%*1 note : *1 : typical design value electrical characteristics (continued) c o = 22 f ? 3, v out setting = 1.0 v, v in = av in = pv in = 12 v, switching frequency = 600 khz v mode = v reg (fccm), t a = 25 ? c ? 2 ? c unless otherwise noted. doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 7 of 33 product standards parameter symbol condition limits unit note min typ max dc-dc characteristics load regulation1 v loa1 i out = 10 ma to 7 a v mode = 0 v ?2.0?%*1 load regulation2 v loa2 i out = 10 ma to 7 a v mode = v reg ?1.0?%*1 line regulation v lin pv in = 6 v to 28 v v mode = v reg i out = 2.0 a ? 0.1 0.3 %/v ? output ripple voltage 1 v rl1 i out = 10 ma v mode = 0 v ?30? mv [p-p] *1 output ripple voltage 2 v rl2 i out = 10 ma v mode = v reg ?15? mv [p-p] *1 output ripple voltage 3 v rl3 i out = 3.5 a v mode = v reg ?10? mv [p-p] *1 load transient response 1 ? v tr1 i out = 100 ma to 3.5 a ? t = 0.5 a / s v mode = 0 v or v reg ?15?mv*1 load transient response 2 ? v tr2 i out = 3.5 a to 100 ma ? t = 0.5 a / s v mode = 0 v or v reg ?20?mv*1 minimum input and output voltage difference v diff v diff =v in ?v out ?2.5?v*1 note : *1 : typical design value electrical characteristics (continued) c o = 22 f ? 3, v out setting = 1.0 v, v in = av in = pv in = 12 v, switching frequency = 600 khz v mode = v reg (fccm), t a = 25 ? c ? 2 ? c unless otherwise noted. doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 8 of 33 product standards parameter symbol condition limits unit note min typ max protection dc-dc over current protection limit 1 i lmt1 ocpcnt=open ? 9.0 ? a *1 dc-dc over current protection limit 2 i lmt2 ocpcnt=220 k ? ?7.0?a*1 dc-dc over current protection limit 3 i lmt3 ocpcnt=100 k ? ?4.7?a*1 thermal shut down (tsd) threshold t tsdth ? ? 130 ? ? c *1 thermal shut down (tsd) hysteresis t tsdhys ??3 0? ? c *1 soft-start timing ss charge current i sschg v ss = 0.3 v 1 2 4 a ? ss discharge resistance (shut-down) r ssdis v en = 0 v ? 5 10 k ? ? switching frequency adjustment dc-dc switching frequency 1 f sw1 i out = 4 a, v fsel = 0 v ? 400 ? khz *1 dc-dc switching frequency 2 f sw2 i out = 4 a, v fsel = open ? 600 ? khz *1 dc-dc switching frequency 3 f sw3 i out = 4 a, v fsel = v reg ? 800 ? khz *1 note : *1 : typical design value electrical characteristics (continued) c o = 22 f ? 3, v out setting = 1.0 v, v in = av in = pv in = 12 v, switching frequency = 600 khz v mode = v reg (fccm), t a = 25 ? c ? 2 ? c unless otherwise noted. doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 9 of 33 product standards pin configuration bottom view pin no. pin name type description 1 vout output output voltage pin 2 3 48 49 50 51 52 53 54 55 56 57 pin functions note : detailed pin descriptions are provided in the operation and application information section. 1 2 3 45 6 7 8 9 10 111213 1415 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 3231 33 3534 36 3837 4039 41 4342 57 56 55 54 53 52 51 50 49 48 47 46 45 44 pvin 62 agnd pgnd vout vout pgnd voutm agnd vfb vfb ss pgood ocpcnt agnd vreg prtcnt mode fsel en avin agnd n.c. bst bst lx_s lx pvin 61 lx 58 vout 59 pgnd 60 pvin doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 10 of 33 product standards pin no. pin name type description 4 pgnd ground ground pin for power mosfet * pin no. 47 : recommended settings ? no connection 5 6 7 47 8 pvin power supply power supply pin for power mosfet recommended rise time ( time to reach 90 % of set value ) setting is greater than or equal to 10 s and less than or equal to 1 s. 9 10 11 12 13 14 15 16 17 18 19 lx output power mosfet output pin an inductor is connected and switching operation is carried out between v in and gnd. * pin no. 19 to 25 : recommended settings ? no connection 20 21 22 23 24 25 26 lx_s output power mosfet output sense pin * pin no. 26 to 27 : recommended settings ? no connection 27 28 bst output high side power mosfet gate driver pin bootstrap operation is carried out in or der to drive the gate voltage of high side power mosfet. * pin no. 28 to 30 : recommended settings ? no connection 29 30 31 nc - non connection pin 32 agnd ground ground pin 39 45 33 avin power supply power supply pin recommended rise time ( time to reach 90 % of set value ) setting is greater than or equal to 10 s and less than or equal to 1 s. 34 en input on / off control pin dc-dc is stopped at low level input, and it is started at high level input. pin functions (continued) note : detailed pin descriptions are provided in the operation and application information section. doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 11 of 33 product standards pin no. pin name type description 35 fsel input frequency select pin this is set to 400 khz at low level input, 800 khz at high level input, and 600 khz at open. 36 mode input skip (discontinuous) mode / fccm (forced continuous conduction mode) select pin skip mode is set at low level input, fccm is set at high level input. 37 prtcnt input protection control set pin for latch mode / auto recovery mode during ovd / scp operations 38 vreg output ldo output pin this is output pin of power supply (ldo) for internal control circuit. 40 ocpcnt input programmable over-current protection. connected resistor on this pin will adjust the over-current protection threshold. 41 pgood output power good open drain pin a pull up resistor between pgood and v reg terminal is necessary. output is low during over or under voltage detection conditions. 42 ss output soft start capacitor connect pin the output voltage at a start up is smoothly controlled by adjusting soft start time. please connect capacitor between ss and gnd. 43 vfb input comparator negative input pin / 1.0 v, 3.3 v output voltage select pin vfb terminal voltage is regulated to ref output (internal reference voltage). since vfb is a high impedance terminal, it should not be routed near other noisy path (lx, bst, etc.) routing path should be kept as short as possible. 44 46 voutm input output voltage sense pin switching frequency is controlled by monitoring output voltage. this pin is also used as feedback pin during internal feedback function. 58 vout output voltage output pin for heat radiation 59 pgnd ground ground pin of power mosfet for heat radiation 60 pvin power supply power supply pin for heat radiation 61 lx output power mosfet output pin for heat radiation 62 agnd ground ground pin for heat radiation note : detailed pin descriptions are provided in the operation and application information section. pin functions (continued) doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 12 of 33 product standards functional block diagram note : this block diagram is for explaining functions. part of the block diagram may be omitted, or it may be simplified. control logic soft start avin 0.6 v vref hgate uvlo scp ocp tsd ref on cmp toff timer + comp ton timer + comp fccm / skip fault 5.6 v soft-start ss vreg bgr vint vbg en hpd hgo lpd lgo lgate vreg voutm vfb fsel mode vreg agnd ss avin pgood pgnd pvin lo vout for internal power 0.6 v + 15 % 0.6 v ? 15 % for internal reset release uvlo protect control prtcnt ocp threshold control ocpcnt lx 26, 27 lx_s 28, 29, 30 bst 41 33 42 34 38 46 43, 44 35 36 n.c. 31 37 40 1.0v / 3.3v divider/selector vreg 32, 39, 45, 62 4, 5, 6 7, 47, 59 1, 2, 3 48, 49, 50 51, 52, 53 54, 55, 56 57, 58 8, 9, 10 11, 12, 13 14, 15, 16 17, 18, 60 19, 20, 21 22, 23, 24 25, 61 doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 13 of 33 product standards operation 1. protection (1) output over-current protection (ocp) function and short-circuit protection (scp) function 1) the over current protection is activated at about 9 a (typ.) when ocpcnt pin is set to open. this device uses pulse ? by ? pulse valley current protection method. when the low side mosfet is turned on, the voltage across the drain and source is monitored which is proportional to the inductor current. the high side mosfet is only allowed to turn on when the current flowing in the low side mosfet falls below the ocp level. hence, during the ocp, the output voltage continues to drop at the specified current. figure : ocp and scp operation output current [a] (ground short protection detection about 60 % of vout ) over current protection ( typ : 9 a ) #ocpcnt = open output voltage [v] 1) 2) 7.3 a to 10.7 a 3) the short-circuit protection function is implemented when the output voltage decreases and the vfb pin reaches to about 60 % of the set voltage of 0.6 v. if the vfb voltage stays below 70 % of 0.6 v for more than 250 s after scp triggers, both high side and low side mosfet will be turned off and the output will be discharged by internal mos transistor. (the above operation after scp triggered is at latch off mode. the details are described in the next page) 2) the over current protection threshold level can be programmed by connecting a pull down resistor at ocpcnt pin. the value of the resistor connected between ocpcnt pin and ground will determine the ocp threshold level. note: the ocp level is fixed to around 0.7 a when ocpcnt pin is connected to ground. table : ocp threshold level (3) output discharging function when en is low, the output is discharged by an internal mosfet transistor. when en is high, if the controller is turned off either by under voltage lock out (uvlo), over voltage detection (ovd) or short circuit protection (scp), the output is discharged by an internal mosfet transistor. the on-resistance of the internal mosfet transistor is about 35 ? . note: prtcnt = v reg ( scp latch off mode ) the accuracy of ocp level is around ? 20 % of the typical value in the above table. ocp level with resistor at ocpcnt pin ( r ocp ) can be calculated by the following approximate equation. ocp level ( typ ) ocpcnt resistor 9 a open ( more than 1m ? ) 7 a 220 k ? 4.7 a 100 k ? note: r ocp is recommended to be more than 100 k ? . ?? ?? ? ?? kr lo ocp 435 9aevel cp (2) output over voltage detection if the vfb pin voltage exceeds 115 % of a predetermined value (0.6 v) and lasts more than 10ns, overvoltage detection will be triggered and pgood pin will be pulled down. furthermore, in an overvoltage condition, high side and low side mosfets are turned off to stop pwm operation. if the vfb pin voltage drops below 110 % of the predetermined value (0.6 v) within 2 ms after overvoltage detection triggers, pgood pin will be pulled up again and pwm operation will resume. otherwise, ic is transferred to latch off state and the output will be discharged by internal mos transistor. (the above operation after ovd triggered is at latch off mode. the details are described in the next page) >2 ms figure : ovd operation 115 % 110 % 100 % 0.6 v vfb pgood 1 ms note: prtcnt = v reg ( ovd latch off mode ) 0.6 v <2 ms doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 14 of 33 product standards 1. protection (continued) (4) protection control (prtcnt) function the ic turn-off operation after over voltage detection and short circuit protection can be programmed by prtcnt pin voltage. changing the input level of prtcnt will select latch off and auto recovery mode for ovd and scp operations. the following table and figures represents detailed explanation of this function. after latch off detection, power reset or en pin reset is necessary to activate the device again. prtcnt ovd operation scp operation l auto recovery open latch off auto recovery v reg latch off 115 % 110 % 100 % 0.6 v vfb pgood 1 ms 0.6 v switching stop 1 ms 2 ms 115 % 110 % 0.6 v vfb pgood 1 ms 0.6 v <2 ms figure : ovd operation1 prtcnt = l : auto recovery case 100 % figure : ovd operation2 prtcnt = open / v reg : latch off case off ( latch off ) 70 % vfb 60 % figure : scp operation1 prtcnt = l / open : auto recovery case table : prtcnt pin threshold level and protection mode switching on switching stop switching stop switching stop <2ms on 2ms 16ms off 2ms dcdc state on dcdc state off switching >2 ms switching on ss note : ss = soft start time dcdc state figure : scp operation2 prtcnt = v reg : latch off case 70 % vfb 60 % < 250 s on 250 s off ( latch off ) dcdc state on / off is repeated operation (continued) doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 15 of 33 product standards 1. protection (continued) (5) output under voltage detection (uvd) during normal operation, if output voltage drops and vfb pin voltage reaches 85 % of its set value (0.6 v), the internal mosfet connec ted to pgood pin, will turn on and the voltage of pgood will be set to low. if the output voltage returns to 90 % of its set value (0.6 v) prior to triggering short-circuit-protection, the mosfet connected to pgood pin will turn off and pgood voltage will become high again after 1 ms delay. figure : uvd operation 90 % 85 % 0.6 v vfb pgood 1 ms (6) thermal shut down (tsd) when the ic internal temperature becomes more than about 130 ? c, tsd operates and dc-dc turns off. operation (continued) (2) switching frequency setting the ic can operate at three different frequencies : 400 khz, 600khz and 800 khz. the switching frequency can be set by fsel pin as indicated in the table below. 2. pin setting (1) operating mode setting the ic can operate at two different modes : skip (discontinuous) mode and forced continuous conduction mode (fccm). in skip mode, the ic is working under pulse skipping mechanism to improve efficiency at light load condition. in fccm, the ic is working at fixed frequency to avoid emi issues. the operating mode can be set by mode pin as follows. mode pin mode l skip mode v reg fccm fsel pin frequency [khz] l 400 open 600 v reg 800 inductor current amplitude is calculated by the following equation ; at v in = 12 v, the recommended settings for the switching frequency, depending on v out is as follows : v out = 1.0v : 400, 600, 800 khz v out = 1.8v : 400, 600, 800 khz v out = 3.3v : 600, 800 khz v out = 5.0v : 800 khz ?? ?? ?? khzf v vvv acinductor sw in out inout 1000 amplitude urrent ? ? ? doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 16 of 33 product standards 3. output voltage setting (1) output voltage setting by external resistor the output voltage can be set by external resistance of fb pin, and its calculation is as follows. below resistors are recommended for following popular output voltage v out [v] r fb1 [ ? ]r fb2 [ ? ] 5.0 11 k 1.5 k 3.3 4.5 k 1 k 1.8 2 k 1 k 1.2 1 k 1 k 1.0 1 k 1.5 k vfb comparator threshold is adjusted to ? 1 %, but the actual output voltage accuracy becomes more than ? 1 % due to the influence from the circuits other than vfb comparator. in the case of vout setti ng = 1.0 v, the actual output voltage accuracy becomes ? 1.5 %. ( v in = 12 v, i out = 3.5 a, fsw = 600 khz, fccm ). v out = ( 1 + ) ? 0.6 r fb1 r fb2 vout r fb1 v fb ( 0.6 v ) r fb2 (2) built-in feed back resistors for 1.0 v / 3.3 v nn31001a has built-in feedback resistors for 1.0 v and 3.3 v output voltage. when the uvlo delay (internal) signal changes from low to high (uvlo release), depending on the state of fb pin, the output voltage can be configured as follows : vfb voltage [v] output voltage [v] v reg 3.3 v open 1.0 v resistor divider adjustable between 0.6 v and 5.5 v en vout vfb figure : timing chart of output voltage setting uvlo v reg 4.3 v table : output voltage setting 0.6v v reg 3.3v 1.0v 0.6v to 5.5v using external resistors open uvlo delay 60s operation (continued) doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 17 of 33 product standards operation (continued) when css is set at 4.7nf, soft-start time is approximately 1.5ms in 1.0v setting. css stimestartsoft ?? ? 2 6.0 )( en ss vout vfb soft start time (s) figure : soft start operation uvlo v reg 4.3 v 4. soft start setting soft start function maintains the smooth control of the output voltage during start up by adjusting soft start time. when the en pin becomes high, the current (2 a) begin to charge toward the external capacitor (css) of ss pin, and the voltage of ss pin increases straightly. because the voltage of vfb pin is controlled by the voltage of ss pin during start up, the voltage of vfb increase straightly to the regulation voltage (0.6 v) together with the voltage of ss pin and keep the regulation voltage after that. on the other hand, the voltage of ss pin increase to about 2.8 v and keep the voltage. the calculation of soft start time is as follows. 70 s 0.6 v doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 18 of 33 product standards 5. start up / shut down settings the start up / shut down is enabled by the en pin. the en pin can be set by either applying voltage from an external voltage source or through a resistor connected to the avin pin. case 1 : setting up the en pin using an external voltage source. when an external voltage source is used, the en pin input voltage (v enh , v enl ) should satisfy the conditions as defined in the electrical characteristics. case 2 : setting up the en pin through a resistor connected to avin pin. when setting up the en pin through a resistor connected to the avin pin, refer to the following equation to calculate the optimal resistor settings. 0 v avin vreg en figure : internal circuit with en pin avin vreg avin en r en1 500 r en2 : 500 k ?? 50 % (minimum 250 k ? ) vd : 5.7 v ? 0.3 v id : less than 100 a figure : internal circuit with en pin [equation] operation (continued) id av in ?v dmin < r en1 < v enh (av in ?v enh ) ? r en2min 66 k ? 350 k? [example ( av in = 12 v, v enh = 5 v )] r en1 av in v dmin id v enh r en2min : pull up resistor of en pin : input voltage : minimum internal zener diode voltage ( 5.4 v ) : internal zener diode current (100 a ) : en pin high level input voltage ( 1.5 v to 5 v ) : minimum pull down resistor ( 250 k ? ) < r en1 < more than 1.5 v doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 19 of 33 product standards typical characteristics curves 1. output ripple voltage condition : v in = 12 v, v out setting = 1.0 v, switching frequency = 600 khz, fccm, c o = 66 f (22 f x 3) i out = 0 a i out = 0.1 a time (1 s/div) lx (5 v/div) v out (50 mv/div) time (1 s/div) lx (5 v/div) v out (50 mv/div) time (1 s/div) lx (5 v/div) v out (50 mv/div) time (1 s/div) lx (5 v/div) v out (50 mv/div) i out = 3 a i out = 7 a doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 20 of 33 product standards typical characteristics curves (continued) 1. output ripple voltage (continued) condition : v in = 12 v, v out setting = 1.0 v, switching frequency = 600 khz, skip mode, c o = 66 f (22 f x 3) i out = 0 a i out = 0.1 a time (2 ms/div) lx (5 v/div) v out (50 mv/div) time (1 s/div) lx (5 v/div) v out (50 mv/div) time (10 s/div) lx (5 v/div) v out (50 mv/div) time (1 s/div) lx (5 v/div) v out (50 mv/div) i out = 3 a i out = 7 a doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 21 of 33 product standards 15 mv 19 mv 13 mv 21 mv v out (50 mv/div) i out (2 a/div) v out (50 mv/div) i out (2 a/div) typical characteristics curves (continued) 2. load transient response condition : v in = 12 v, v out setting = 1.0 v, switching frequency = 600 khz, fccm, c o = 66 f (22 f x 3), i out = 0.1 a to 3.5 a ( 0.5 a / s ) condition : v in = 12 v, v out setting = 1.0 v, switching frequency = 600 khz, skip mode, c o = 66 f (22 f x 3), i out = 0.1 a to 3.5 a ( 0.5 a / s ) time (100 s/div) time (100 s/div) doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 22 of 33 product standards typical characteristics curves 3. efficiency condition : v in = 12 v, v out setting = 1.0 v, switching frequency = 400 / 600 / 800 khz, fccm / skip mode, c o = 66 f (22 f x 3) condition : v in = 12 v, v out setting = 3.3 v, switching frequency = 600 / 800 khz, fccm / skip mode, c o = 66 f (22 f x 3) efficiency curve efficiency curve 40 50 60 70 80 90 100 0.01 0.1 1 10 iout [a] efficiency [%] fccm, fsw=400khz fccm, fsw=600khz fccm, fsw=800khz skip, fsw=400khz skip, fsw=600khz skip, fsw=800khz 40 50 60 70 80 90 100 0.01 0.1 1 10 iout [a] efficiency [%] fccm, fsw=600khz fccm, fsw=800khz skip, fsw=600khz skip, fsw=800khz 7 7 doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 23 of 33 product standards typical characteristics curves (continued) 4. load regulation condition : v in = 12 v, v out setting = 1.0 v, switching frequency = 600 khz, fccm, c o = 66 f (22 f x 3) condition : v in = 12 v, v out setting = 1.0 v, switching frequency = 600 khz, skip mode, c o = 66 f (22 f x 3) load regulation fccm load regulation skip mode 0.90 0.95 1.00 1.05 1.10 01234567 iout [a] vout [v] 0.90 0.95 1.00 1.05 1.10 01234567 iout [a] vout [v] doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 24 of 33 product standards typical characteristics curves (continued) 5. line regulation condition : i out = 2 a, v out setting = 1.0 v, switching frequency = 600 khz, fccm, c o = 66 f (22 f x 3) condition : i out = 2 a, v out setting = 1.0 v, switching frequency = 600 khz, skip mode, c o = 66 f (22 f x 3) line regulation fccm line regulation skip mode doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 25 of 33 product standards typical characteristics curves (continued) 6. start-up condition : v in = 12 v, v out setting = 1.0 v, i out = 0 a, switching frequency = 600 khz, fccm, c o = 66 f (22 f x 3) vout (0.5 v/div) en (2 v/div) ss (2 v/div) time (10 ms/div) en = low to high vout (0.5 v/div) en (2 v/div) ss (2 v/div) time (10 ms/div) en = high to low doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 26 of 33 product standards typical characteristics curves (continued) 7. switching frequency condition : v in = 12 v, v out setting = 1.0 v, switching frequency = 600 khz, fccm, c o = 66 f (22 f x 3) condition : v in = 12 v, v out setting = 1.0 v, switching frequency = 600 khz, skip mode, c o = 66 f (22 f x 3) switching frequency fccm switching frequency skip mode 7 7 doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 27 of 33 product standards typical characteristics curves (continued) 8. thermal performance condition : v in = 12 v, v out setting = 1.0 v, i out = 7 a, switching frequency = 600 khz, fccm, c o = 66 f (22 f x 3) doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 28 of 33 product standards typical characteristics curves (continued) 9. derating curve condition : v in = 12 v, v out setting = 1.0 / 3.3 / 5.0 v, switching frequency = 600 / 800 khz, fccm, c o = 66 f (22 f x 3), air flow = 0 lfm 0 2 4 6 8 10 0 102030405060708090100 iout(a) ta() vout=5.0v, fsw=800khz vout=3.3v, fsw=800khz vout=1.0v, fsw=600khz doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 29 of 33 product standards figure top layer with silk screen ( top view ) with evaluation board figure bottom layer with silk screen ( bottom view ) with evaluation board applications information 1. evaluation board information condition : v out setting = 1.0 v, switching frequency = 600 khz, fccm note : the application circuit diagram and layout diagram explained in this section, should be used as reference examples. the operation of the mass production set is not guarant eed. sufficient evaluation and verification is required in the design of the mass production set. the customer is fully responsible for the incorporation of the above illustrated application circuit and th e information attached with it, in the design of the equipment. figure application circuit c-pvin1 c-pvin2 c-dcdcout1 c-dcdcout2 c-dcdcout3 r-fb1 2 r-fb3,4 c-ss r-pg vin gnd vout vreg figure layout doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 30 of 33 product standards applications information (continued) 2. layout recommendations board layout considerations are needed for stable operation of the dc-dc regulator. it is recommended to follow the below notes of caution when designing the board layout. (a) the input capacitor c in is recommended to be placed in such a way that the loop (1) in the right figure becomes minimum in order to suppress the switching noise. (b) a single point ground connection (2) is recommended for the connection of pgnd and agnd to improve operation stability. (c) output current line i out and the output sense line voutm is recommended to have small common impedance to reduce output load variations. output sense line voutm must be close to the output capacitor c o as indicated by (3) in the right figure. (d) power loss and output ripple voltage can be reduced by placing the output capacitor c o so that the parasitic inductance and the impedance of loop (4) in the right figure becomes minimum. this is achieved by reducing the distance between output capacitor c o and (2) / (3). (e) thick lines in the right figure represent lines with large current flow. these lines should be designed as thick as possible. (f) vfb / ss / vreg lines should be placed far away from lx, bst pins to reduce the influence of switching noise. these lines should be designed as short as possible. this is especially true for the vfb line, which is a high impedance line. (g) r fb1 / r fb2 should also be placed as far away as possible from lx, bst pins to minimize the influence of switching noise. r fb1 / r fb2 should be placed close to the vfb pin. note : the application circuit diagram and layout diagram explained in this section, should be used as reference examples. the operat ion of the mass production set is not guaranteed. sufficient evaluation and verification is required in the design of the mass production set. the customer is fully responsible for the incorporation of the above illustrated applic ation circuit and the information attached with it, in the design of the equipment. vfb vout pgnd agnd avin pvin voutm i out c o c in r fb1 r fb2 (1) (4) (3) (2) figure : application circuit diagram doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 31 of 33 product standards reference designator qty value manufacturer part number note c-pvin1 c-pvin2 2 10 f taiyo yuden umk325ab7106mm-t ? c-dcdcout1 c-dcdcout2 c-dcdcout3 3 22 f murata grm32er71e226ke15l ? c-ss 1 4.7 nf murata grm188r71h472ka01 ? r-fb1 1 0 ? panasonic erj3gey0r00v ? r-fb2 1 1 k ? panasonic ERJ3EKF1001V ? r-rb3 1 1.5 k ? panasonic erj3ekf1501v ? r-fb4 1 0 ? panasonic erj3gey0r00v ? r-pg 1 100 k ? panasonic erj3ekf1003v ? applications information (continued) 3. recommended components note : the above feedback resistor setting is for v out = 1 v. doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 32 of 33 product standards outline drawing package code : hqfn057-a-075085 package information unit : mm doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 33 of 33 product standards important notice 1. when using the ic for new models, verify the safety including the long-term reliability for each product. 2. when the application system is designed by using this ic, please confirm the notes in this book. please read the notes to descriptions and the usage notes in the book. 3. this ic is intended to be used for general electronic equipment. consult our sales staff in advance for information on the following applications: special applications in which exceptional quality and reliab ility are required, or if the failure or malfunction of this ic may directly j eopardize life or harm the human body. any applications other than t he standard applications intended. (1) space appliance (s uch as artificial satellite, and rocket) (2) traffic control equipment (such as for automotive, airplane, train, and ship) (3) medical equipment for life support (4) submarine transponder (5) control equipment for power plant (6) disaster prevention and security device (7) weapon (8) others : applications of which reliability equivalent to (1) to (7) is required our company shall not be held responsible for any damage incurred as a result of or in connection with the ic being used for any special application, unless our company agrees to the use of such special application. however, for the ic which we designate as products for automotive use, it is possible to be used for automotive. 4. this ic is neither designed nor intended for use in automotiv e applications or environments unless the ic is designated by ou r company to be used in automotive applications. our company shall not be held responsible for any damage incurred by customers or any third party as a result of or in connection with the ic being used in automotive application, unless our company agrees to such application in this book. 5. please use this ic in compliance with all applicable laws and regulations that regulate the in clusion or use of controlled substances, including without limitation, the eu rohs directive. our company shall not be held responsible for any damage incurred as a result of our ic being used by our customers, not complying with the applicable laws and regulations. 6. pay attention to the direction of t he ic. when mounting it in the wrong direction onto the pcb (printed-circuit-board), it might be damaged. 7. pay attention in the pcb (printed-circuit-board) pattern layo ut in order to prevent damage due to short circuit between pins. in addition, refer to the pin description for the pin configuration. 8. perform visual inspection on the pcb before applying power, otherwise damage might happen due to problems such as solder-bridge between the pins of the ic. also, perform full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the ic during transportation. 9. take notice in the use of this ic that it might be damaged when an abnormal state occurs such as output pin-vcc short (power supply fault), output pin-gnd short (ground fault), or output -to-output-pin short (load short). safety measures such as installation of fuses are recommended because the ext ent of the above-mentioned damage will depen d on the current capability of the power supply. 10. the protection circuit is for maintaining safety against abno rmal operation. therefore, the protection circuit should not w ork during normal operation. especially for the thermal protection circuit, if the area of safe operation or the absolute maximum rating is momentarily exceeded due to output pin to vcc short (power supply fault), or output pin to gnd short (ground fault), the ic might be damaged before the thermal protection circuit could operate. 11. unless specified in the pr oduct specifications, make sure that negative voltage or excessiv e voltage are not applied to the pins because the ic might be damaged, which could happen due to negative voltage or excessive voltage generated during the on and off timing when the inductive load of a motor co il or actuator coils of optical pick-up is being driven. 12. product which has specified aso (area of safe operation) should be operated in aso 13. verify the risks which might be caused by the malfuncti ons of external components. 14. connect the metallic plates (fins) on the back side of the ic with t heir respective potentials (agnd, pvin, lx, vout, pgnd). the thermal resistance and the el ectrical characterist ics are guaranteed only when the meta llic plates (fins) are connected with their respective potentials. doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 1 of 2 recommended soldering conditions for the following soldering conditions, it shows the limitations of heat resistance a t mounting a de vic e and it is no gua ra nte e of the solde ring re lia bility. please set the appropriate condition suitable for the materials such as solder material. reflow solderin g peak temperature : less than 260 temperature is measured at package surface point 1 recommended soldering conditions max. 260 reflow peak temp : no mark contents value 1t1 pre-heating temp. 150 180 2 pre-heating temp. hold time 60 s 120 s 3a rising rate 2 /s 5 /s 5tp peak temp. hold time 10 s3 s 4tp peak temp. 255 +5 ? -0 down rate 2 /s 5 /s 6tw high temp. region hold time within 60 s ( R 220 ) product name : package : nn31001a hqfn057-a-075085 8- number of reflow within 2 times 7b 140 160 180 200 220 240 255 time t1 t1 t w tp tp 220 260 a b 260 doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
nn31001a page 2 of 2 recommended soldering conditions because the taping and the magazine materials are not the heat-resistant materials, the bake at 125 cannot be done. therefore, please solder everything or control everything in the rule time. please keep them in an equal environment with the moisture-proof packaging or dry box. to control storage time, when bake in the taping and the magazine is necessary, it is necessary for each type to set a bake condition. please inquire of our company. low te mpe rature bake condition : 40 / 25 rh or less / 192h storage environment conditions: keep the following conditions ta=5 30 ? rh=30 % 70 %. storage period before opening dry pack shall be 1year from a shipping day under ta=5 30 ? rh=30 % 70 %. when the storage exceeds, bake at 125 with 15 h to 25 h. baking cycle should be only one time. please be cautious of solderability at baking. in case that use reflow two times, 2nd reflow must be finished within 168 hours. remove flux sufficiently from product in the washing process. ( flux : chlorineless rosin flux is recommended.) in case that use ultrasonic for product washing, there is the possibility that the resonance may occur due to the frequency and shape of pcb. it may be affected to the strength of lead. please be cautious of this matter. 3 note 2 storage environment after dry pack opening open dry pack storage environment kept up to soldering (at 30 /70 %rh max. , within 168 h ) soldering bake at 125 with 15 h to 25 h *please refer to the following when doing at the low temperature bake. when the storage time exceeds 168 h doc no. ta4-ea-06262 revision. 2 established : 2014-07-03 revised 2014-07-08
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) if any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) the technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) the products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. consult our sales staff in advance for information on the following applications: ? special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. it is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) the products and product specifications described in this book are subject to change without notice for modification and/or im- provement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to make sure that the latest specifications satisfy your requirements. (5) when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) this book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202

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